UniTO/anno2/YearI/SecondSem/VPC/labs/analisi/es3/es3-2.smv

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2018-11-22 13:09:11 +01:00
MODULE main
VAR
turn : 1..2;
p : process user(turn, 1, 2);
q : process user(turn, 2, 1);
ASSIGN
init(turn) := 1;
SPEC
AG (p.state = p1 -> EF p.state = p2 )
MODULE user(turnloc, myproc, otherproc)
VAR
state : {p1,p2,p3,p4};
ASSIGN
init(state) := p1;
next(state) :=
case
state = p1 : {p1, p2};
state = p2 & turnloc = myproc : p3;
state = p3 : p4;
state = p4 : p1;
TRUE : state;
esac;
next(turnloc) :=
case
state = p4 : otherproc;
TRUE : turnloc;
esac;
FAIRNESS
running