mirror of
https://github.com/felis/USB_Host_Shield_2.0.git
synced 2024-03-22 11:31:26 +01:00
Use new Arduino SPI library
See: https://github.com/arduino/Arduino/pull/2223
This commit is contained in:
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commit
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2 changed files with 64 additions and 15 deletions
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@ -137,8 +137,8 @@ e-mail : support@circuitsathome.com
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#define USING_SPI4TEENSY3 0
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#define USING_SPI4TEENSY3 0
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#endif
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#endif
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#if defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
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#if (defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)) || ARDUINO >= 158
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#include <SPI.h> // Use the Arduino SPI library for the Arduino Due
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#include <SPI.h> // Use the Arduino SPI library for the Arduino Due or if the SPI library with transaction is available
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#endif
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#endif
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#endif /* SETTINGS_H */
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#endif /* SETTINGS_H */
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73
usbhost.h
73
usbhost.h
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@ -30,7 +30,11 @@ e-mail : support@circuitsathome.com
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/* SPI initialization */
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/* SPI initialization */
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template< typename SPI_CLK, typename SPI_MOSI, typename SPI_MISO, typename SPI_SS > class SPi {
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template< typename SPI_CLK, typename SPI_MOSI, typename SPI_MISO, typename SPI_SS > class SPi {
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public:
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public:
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#if USING_SPI4TEENSY3
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#if SPI_HAS_TRANSACTION
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static void init() {
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SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
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}
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#elif USING_SPI4TEENSY3
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static void init() {
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static void init() {
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// spi4teensy3 inits everything for us, except /SS
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// spi4teensy3 inits everything for us, except /SS
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// CLK, MOSI and MISO are hard coded for now.
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// CLK, MOSI and MISO are hard coded for now.
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@ -129,8 +133,17 @@ MAX3421e< SPI_SS, INTR >::MAX3421e() {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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#if USING_SPI4TEENSY3
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#if SPI_HAS_TRANSACTION
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uint8_t c[2];
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c[0] = reg | 0x02;
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c[1] = data;
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SPI.transfer(c, 2);
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#elif USING_SPI4TEENSY3
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uint8_t c[2];
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uint8_t c[2];
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c[0] = reg | 0x02;
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c[0] = reg | 0x02;
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c[1] = data;
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c[1] = data;
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@ -144,7 +157,11 @@ void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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SPDR = data;
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SPDR = data;
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while(!(SPSR & (1 << SPIF)));
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while(!(SPSR & (1 << SPIF)));
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#endif
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#endif
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SPI_SS::Set();
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SPI_SS::Set();
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#if SPI_HAS_TRANSACTION
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SPI.endTransaction();
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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return;
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return;
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};
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};
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@ -154,8 +171,16 @@ void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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#if USING_SPI4TEENSY3
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#if SPI_HAS_TRANSACTION
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SPI.transfer(reg | 0x02);
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SPI.transfer(data_p, nbytes);
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data_p += nbytes;
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#elif USING_SPI4TEENSY3
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spi4teensy3::send(reg | 0x02);
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spi4teensy3::send(reg | 0x02);
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spi4teensy3::send(data_p, nbytes);
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spi4teensy3::send(data_p, nbytes);
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data_p += nbytes;
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data_p += nbytes;
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@ -176,7 +201,11 @@ uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t*
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}
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}
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while(!(SPSR & (1 << SPIF)));
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while(!(SPSR & (1 << SPIF)));
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#endif
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#endif
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SPI_SS::Set();
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SPI_SS::Set();
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#if SPI_HAS_TRANSACTION
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SPI.endTransaction();
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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return ( data_p);
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return ( data_p);
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}
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}
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@ -196,23 +225,31 @@ void MAX3421e< SPI_SS, INTR >::gpioWr(uint8_t data) {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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#if USING_SPI4TEENSY3
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spi4teensy3::send(reg);
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#if (defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)) || SPI_HAS_TRANSACTION
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uint8_t rv = spi4teensy3::receive();
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SPI_SS::Set();
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#elif defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
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SPI.transfer(reg);
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SPI.transfer(reg);
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uint8_t rv = SPI.transfer(0);
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uint8_t rv = SPI.transfer(0); // Send empty byte
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SPI_SS::Set();
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#elif USING_SPI4TEENSY3
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spi4teensy3::send(reg);
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uint8_t rv = spi4teensy3::receive(); // Send empty byte
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SPI_SS::Set();
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SPI_SS::Set();
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#else
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#else
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SPDR = reg;
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SPDR = reg;
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while(!(SPSR & (1 << SPIF)));
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while(!(SPSR & (1 << SPIF)));
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SPDR = 0; //send empty byte
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SPDR = 0; // Send empty byte
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while(!(SPSR & (1 << SPIF)));
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while(!(SPSR & (1 << SPIF)));
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SPI_SS::Set();
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SPI_SS::Set();
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uint8_t rv = SPDR;
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uint8_t rv = SPDR;
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#endif
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#endif
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#if SPI_HAS_TRANSACTION
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SPI.endTransaction();
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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return (rv);
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return (rv);
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}
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}
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@ -222,8 +259,16 @@ uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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#if USING_SPI4TEENSY3
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#if SPI_HAS_TRANSACTION
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SPI.transfer(reg);
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SPI.transfer(data_p, nbytes);
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data_p += nbytes;
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#elif USING_SPI4TEENSY3
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spi4teensy3::send(reg);
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spi4teensy3::send(reg);
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spi4teensy3::receive(data_p, nbytes);
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spi4teensy3::receive(data_p, nbytes);
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data_p += nbytes;
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data_p += nbytes;
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@ -253,7 +298,11 @@ uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t*
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}
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}
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#endif
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#endif
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#endif
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#endif
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SPI_SS::Set();
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SPI_SS::Set();
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#if SPI_HAS_TRANSACTION
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SPI.endTransaction();
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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return ( data_p);
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return ( data_p);
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}
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}
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@ -439,7 +488,7 @@ uint8_t MAX3421e< SPI_SS, INTR >::IntHandler() {
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//template< typename SPI_SS, typename INTR >
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//template< typename SPI_SS, typename INTR >
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//uint8_t MAX3421e< SPI_SS, INTR >::GpxHandler()
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//uint8_t MAX3421e< SPI_SS, INTR >::GpxHandler()
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//{
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//{
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// uint8_t GPINIRQ = regRd( rGPINIRQ ); //read GPIN IRQ register
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// uint8_t GPINIRQ = regRd( rGPINIRQ ); //read GPIN IRQ register
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//// if( GPINIRQ & bmGPINIRQ7 ) { //vbus overload
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//// if( GPINIRQ & bmGPINIRQ7 ) { //vbus overload
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//// vbusPwr( OFF ); //attempt powercycle
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//// vbusPwr( OFF ); //attempt powercycle
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//// delay( 1000 );
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//// delay( 1000 );
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