mirror of
https://github.com/felis/USB_Host_Shield_2.0.git
synced 2024-03-22 11:31:26 +01:00
Workaround issue with SPI_HAS_TRANSACTION is just defined and not set to a value in the ESP8266 Arduino core
This commit is contained in:
parent
f087a57895
commit
6fbe00703a
1 changed files with 13 additions and 13 deletions
26
usbhost.h
26
usbhost.h
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@ -39,7 +39,7 @@ public:
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SPI_SS::SetDirWrite();
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SPI_SS::SetDirWrite();
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SPI_SS::Set();
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SPI_SS::Set();
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}
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}
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#elif SPI_HAS_TRANSACTION
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#elif defined(SPI_HAS_TRANSACTION)
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static void init() {
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static void init() {
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SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
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SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
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SPI_SS::SetDirWrite();
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SPI_SS::SetDirWrite();
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@ -154,7 +154,7 @@ MAX3421e< SPI_SS, INTR >::MAX3421e() {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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@ -164,7 +164,7 @@ void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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c[0] = reg | 0x02;
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c[0] = reg | 0x02;
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c[1] = data;
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c[1] = data;
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spi4teensy3::send(c, 2);
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spi4teensy3::send(c, 2);
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#elif SPI_HAS_TRANSACTION
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#elif defined(SPI_HAS_TRANSACTION)
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uint8_t c[2];
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uint8_t c[2];
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c[0] = reg | 0x02;
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c[0] = reg | 0x02;
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c[1] = data;
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c[1] = data;
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@ -185,7 +185,7 @@ void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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#endif
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#endif
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SPI_SS::Set();
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SPI_SS::Set();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.endTransaction();
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SPI.endTransaction();
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#endif
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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@ -197,7 +197,7 @@ void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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@ -206,7 +206,7 @@ uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t*
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spi4teensy3::send(reg | 0x02);
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spi4teensy3::send(reg | 0x02);
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spi4teensy3::send(data_p, nbytes);
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spi4teensy3::send(data_p, nbytes);
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data_p += nbytes;
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data_p += nbytes;
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#elif SPI_HAS_TRANSACTION
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#elif defined(SPI_HAS_TRANSACTION)
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SPI.transfer(reg | 0x02);
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SPI.transfer(reg | 0x02);
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SPI.transfer(data_p, nbytes);
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SPI.transfer(data_p, nbytes);
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data_p += nbytes;
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data_p += nbytes;
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@ -238,7 +238,7 @@ uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t*
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#endif
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#endif
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SPI_SS::Set();
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SPI_SS::Set();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.endTransaction();
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SPI.endTransaction();
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#endif
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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@ -260,7 +260,7 @@ void MAX3421e< SPI_SS, INTR >::gpioWr(uint8_t data) {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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@ -274,7 +274,7 @@ uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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uint8_t rv = 0;
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uint8_t rv = 0;
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HAL_SPI_Receive(&SPI_Handle, &rv, 1, HAL_MAX_DELAY);
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HAL_SPI_Receive(&SPI_Handle, &rv, 1, HAL_MAX_DELAY);
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SPI_SS::Set();
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SPI_SS::Set();
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#elif !defined(SPDR) || SPI_HAS_TRANSACTION
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#elif !defined(SPDR) || defined(SPI_HAS_TRANSACTION)
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SPI.transfer(reg);
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SPI.transfer(reg);
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uint8_t rv = SPI.transfer(0); // Send empty byte
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uint8_t rv = SPI.transfer(0); // Send empty byte
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SPI_SS::Set();
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SPI_SS::Set();
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@ -287,7 +287,7 @@ uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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uint8_t rv = SPDR;
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uint8_t rv = SPDR;
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#endif
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#endif
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.endTransaction();
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SPI.endTransaction();
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#endif
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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@ -299,7 +299,7 @@ uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
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template< typename SPI_SS, typename INTR >
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template< typename SPI_SS, typename INTR >
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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XMEM_ACQUIRE_SPI();
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XMEM_ACQUIRE_SPI();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
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#endif
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#endif
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SPI_SS::Clear();
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SPI_SS::Clear();
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@ -308,7 +308,7 @@ uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t*
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spi4teensy3::send(reg);
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spi4teensy3::send(reg);
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spi4teensy3::receive(data_p, nbytes);
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spi4teensy3::receive(data_p, nbytes);
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data_p += nbytes;
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data_p += nbytes;
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#elif SPI_HAS_TRANSACTION
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#elif defined(SPI_HAS_TRANSACTION)
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SPI.transfer(reg);
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SPI.transfer(reg);
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memset(data_p, 0, nbytes); // Make sure we send out empty bytes
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memset(data_p, 0, nbytes); // Make sure we send out empty bytes
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SPI.transfer(data_p, nbytes);
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SPI.transfer(data_p, nbytes);
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@ -350,7 +350,7 @@ uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t*
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#endif
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#endif
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SPI_SS::Set();
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SPI_SS::Set();
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#if SPI_HAS_TRANSACTION
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#if defined(SPI_HAS_TRANSACTION)
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SPI.endTransaction();
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SPI.endTransaction();
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#endif
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#endif
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XMEM_RELEASE_SPI();
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XMEM_RELEASE_SPI();
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