specchioriflesso/USB_Host_Shield_2.0
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Merge pull request #170 from ginge/master

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Add Teensy LC support. Note: disables spi4teensy lib. (Barry Carter)
This commit is contained in:
Kristian Sloth Lauszus 2015-07-22 23:43:20 +02:00
commit c15e6373b4
3 changed files with 74 additions and 2 deletions
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64
avrpins.h
View file

@ -835,6 +835,70 @@ MAKE_PIN(P33, CORE_PIN33_PORTREG, CORE_PIN33_BIT, CORE_PIN33_CONFIG);
#undef MAKE_PIN
#elif defined(CORE_TEENSY) && (defined(__MKL26Z64__))
// we could get lower level by making these macros work properly.
// for now just use the semi optimised version, it costs a lookup in the pin pgm table per op
// but for now it will do.
//#define GPIO_BITBAND_ADDR(reg, bit) (((volatile uint8_t *)&(reg) + ((bit) >> 3)))
//#define GPIO_BITBAND_MASK(reg, bit) (1<<((bit) & 7))
//#define GPIO_BITBAND_PTR(reg, bit) ((volatile uint8_t *)GPIO_BITBAND_ADDR((reg), (bit)))
#include "core_pins.h"
#include "avr_emulation.h"
#define MAKE_PIN(className, baseReg, pinNum, configReg) \
class className { \
public: \
static void Set() { \
*portSetRegister(pinNum) = digitalPinToBitMask(pinNum); \
} \
static void Clear() { \
*portClearRegister(pinNum) = digitalPinToBitMask(pinNum); \
} \
static void SetDirRead() { \
configReg = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1); \
*portModeRegister(pinNum) &= ~digitalPinToBitMask(pinNum); \
} \
static void SetDirWrite() { \
configReg = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1); \
*portModeRegister(pinNum) |= digitalPinToBitMask(pinNum); \
} \
static uint8_t IsSet() { \
return (*portInputRegister(pinNum) & digitalPinToBitMask(pinNum)) ? 1 : 0; \
} \
};
MAKE_PIN(P0, CORE_PIN0_PORTREG, 0, CORE_PIN0_CONFIG);
MAKE_PIN(P1, CORE_PIN1_PORTREG, 1, CORE_PIN1_CONFIG);
MAKE_PIN(P2, CORE_PIN2_PORTREG, 2, CORE_PIN2_CONFIG);
MAKE_PIN(P3, CORE_PIN3_PORTREG, 3, CORE_PIN3_CONFIG);
MAKE_PIN(P4, CORE_PIN4_PORTREG, 4, CORE_PIN4_CONFIG);
MAKE_PIN(P5, CORE_PIN5_PORTREG, 5, CORE_PIN5_CONFIG);
MAKE_PIN(P6, CORE_PIN6_PORTREG, 6, CORE_PIN6_CONFIG);
MAKE_PIN(P7, CORE_PIN7_PORTREG, 7, CORE_PIN7_CONFIG);
MAKE_PIN(P8, CORE_PIN8_PORTREG, 8, CORE_PIN8_CONFIG);
MAKE_PIN(P9, CORE_PIN9_PORTREG, 9, CORE_PIN9_CONFIG);
MAKE_PIN(P10, CORE_PIN10_PORTREG, 10, CORE_PIN10_CONFIG);
MAKE_PIN(P11, CORE_PIN11_PORTREG, 11, CORE_PIN11_CONFIG);
MAKE_PIN(P12, CORE_PIN12_PORTREG, 12, CORE_PIN12_CONFIG);
MAKE_PIN(P13, CORE_PIN13_PORTREG, 13, CORE_PIN13_CONFIG);
MAKE_PIN(P14, CORE_PIN14_PORTREG, 14, CORE_PIN14_CONFIG);
MAKE_PIN(P15, CORE_PIN15_PORTREG, 15, CORE_PIN15_CONFIG);
MAKE_PIN(P16, CORE_PIN16_PORTREG, 16, CORE_PIN16_CONFIG);
MAKE_PIN(P17, CORE_PIN17_PORTREG, 17, CORE_PIN17_CONFIG);
MAKE_PIN(P18, CORE_PIN18_PORTREG, 18, CORE_PIN18_CONFIG);
MAKE_PIN(P19, CORE_PIN19_PORTREG, 19, CORE_PIN19_CONFIG);
MAKE_PIN(P20, CORE_PIN20_PORTREG, 20, CORE_PIN20_CONFIG);
MAKE_PIN(P21, CORE_PIN21_PORTREG, 21, CORE_PIN21_CONFIG);
MAKE_PIN(P22, CORE_PIN22_PORTREG, 22, CORE_PIN22_CONFIG);
MAKE_PIN(P23, CORE_PIN23_PORTREG, 23, CORE_PIN23_CONFIG);
MAKE_PIN(P24, CORE_PIN24_PORTREG, 24, CORE_PIN24_CONFIG);
MAKE_PIN(P25, CORE_PIN25_PORTREG, 25, CORE_PIN25_CONFIG);
MAKE_PIN(P26, CORE_PIN26_PORTREG, 26, CORE_PIN26_CONFIG);
#undef MAKE_PIN
#elif defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
// SetDirRead:

8
settings.h
View file

@ -71,6 +71,12 @@ e-mail : support@circuitsathome.com
#define USE_SPI4TEENSY3 1
#endif
// disabled on the Teensy LC as it is incompatible for now
#if defined(__MKL26Z64__)
#undef USE_SPI4TEENSY3
#define USE_SPI4TEENSY3 0
#endif
////////////////////////////////////////////////////////////////////////////////
// AUTOMATIC Settings
////////////////////////////////////////////////////////////////////////////////
@ -123,7 +129,7 @@ e-mail : support@circuitsathome.com
#define EXT_RAM 0
#endif
#if defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__))
#if defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MKL26Z64__))
#define USING_SPI4TEENSY3 USE_SPI4TEENSY3
#else
#define USING_SPI4TEENSY3 0

4
usbhost.h
View file

@ -42,6 +42,8 @@ public:
#elif SPI_HAS_TRANSACTION
static void init() {
SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
SPI_SS::SetDirWrite();
SPI_SS::Set();
}
#elif !defined(SPDR)
static void init() {
@ -84,7 +86,7 @@ typedef SPi< Pb1, Pb2, Pb3, Pb0 > spi;
typedef SPi< Pb5, Pb3, Pb4, Pb2 > spi;
#elif defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284__) || defined(__AVR_ATmega1284P__)
typedef SPi< Pb7, Pb5, Pb6, Pb4 > spi;
#elif (defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__))) || defined(__ARDUINO_X86__) || defined(__MIPSEL__)
#elif (defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MKL26Z64__))) || defined(__ARDUINO_X86__) || defined(__MIPSEL__)
typedef SPi< P13, P11, P12, P10 > spi;
#elif defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
typedef SPi< P76, P75, P74, P10 > spi;