From f283e90402a9abab6776aa2697c35320ae8037fc Mon Sep 17 00:00:00 2001 From: Kristian Lauszus Date: Sun, 15 Dec 2013 22:19:50 +0100 Subject: [PATCH] Renamed CLK, MOSI, MISO and SS variables, as they conflicted with defines in pins_arduino.h See: https://github.com/arduino/Arduino/commit/7fcba37acfd11313640b3f5d5c813d63d2f59999 --- usbhost.h | 96 +++++++++++++++++++++++++++---------------------------- 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/usbhost.h b/usbhost.h index 81949431..90b4da5a 100644 --- a/usbhost.h +++ b/usbhost.h @@ -28,7 +28,7 @@ e-mail : support@circuitsathome.com #endif /* SPI initialization */ -template< typename CLK, typename MOSI, typename MISO, typename SPI_SS > class SPi { +template< typename SPI_CLK, typename SPI_MOSI, typename SPI_MISO, typename SPI_SS > class SPi { #if USING_SPI4TEENSY3 public: @@ -46,9 +46,9 @@ public: static void init() { //uint8_t tmp; - CLK::SetDirWrite(); - MOSI::SetDirWrite(); - MISO::SetDirRead(); + SPI_CLK::SetDirWrite(); + SPI_MOSI::SetDirWrite(); + SPI_MISO::SetDirRead(); SPI_SS::SetDirWrite(); /* mode 00 (CPOL=0, CPHA=0) master, fclk/2. Mode 11 (CPOL=11, CPHA=11) is also supported by MAX3421E */ SPCR = 0x50; @@ -78,7 +78,7 @@ typedef enum { vbus_off = GPX_VBDET } VBUS_t; -template< typename SS, typename INTR > class MAX3421e /* : public spi */ { +template< typename SPI_SS, typename INTR > class MAX3421e /* : public spi */ { static uint8_t vbusState; public: @@ -106,12 +106,12 @@ public: uint8_t Task(); }; -template< typename SS, typename INTR > - uint8_t MAX3421e< SS, INTR >::vbusState = 0; +template< typename SPI_SS, typename INTR > + uint8_t MAX3421e< SPI_SS, INTR >::vbusState = 0; /* constructor */ -template< typename SS, typename INTR > -MAX3421e< SS, INTR >::MAX3421e() { +template< typename SPI_SS, typename INTR > +MAX3421e< SPI_SS, INTR >::MAX3421e() { // Leaving ADK hardware setup in here, for now. This really belongs with the other parts. #ifdef BOARD_MEGA_ADK // For Mega ADK, which has a Max3421e on-board, set MAX_RESET to output mode, and then set it to HIGH @@ -121,10 +121,10 @@ MAX3421e< SS, INTR >::MAX3421e() { }; /* write single byte into MAX3421 register */ -template< typename SS, typename INTR > -void MAX3421e< SS, INTR >::regWr(uint8_t reg, uint8_t data) { +template< typename SPI_SS, typename INTR > +void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) { XMEM_ACQUIRE_SPI(); - SS::Clear(); + SPI_SS::Clear(); #if USING_SPI4TEENSY3 uint8_t c[2]; c[0] = reg | 0x02; @@ -136,17 +136,17 @@ void MAX3421e< SS, INTR >::regWr(uint8_t reg, uint8_t data) { SPDR = data; while(!(SPSR & (1 << SPIF))); #endif - SS::Set(); + SPI_SS::Set(); XMEM_RELEASE_SPI(); return; }; /* multiple-byte write */ /* returns a pointer to memory position after last written */ -template< typename SS, typename INTR > -uint8_t* MAX3421e< SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) { +template< typename SPI_SS, typename INTR > +uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) { XMEM_ACQUIRE_SPI(); - SS::Clear(); + SPI_SS::Clear(); #if USING_SPI4TEENSY3 spi4teensy3::send(reg | 0x02); spi4teensy3::send(data_p, nbytes); @@ -160,7 +160,7 @@ uint8_t* MAX3421e< SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* dat } while(!(SPSR & (1 << SPIF))); #endif - SS::Set(); + SPI_SS::Set(); XMEM_RELEASE_SPI(); return( data_p); } @@ -168,8 +168,8 @@ uint8_t* MAX3421e< SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* dat /*GPIO byte is split between 2 registers, so two writes are needed to write one byte */ /* GPOUT bits are in the low nibble. 0-3 in IOPINS1, 4-7 in IOPINS2 */ -template< typename SS, typename INTR > -void MAX3421e< SS, INTR >::gpioWr(uint8_t data) { +template< typename SPI_SS, typename INTR > +void MAX3421e< SPI_SS, INTR >::gpioWr(uint8_t data) { regWr(rIOPINS1, data); data >>= 4; regWr(rIOPINS2, data); @@ -177,20 +177,20 @@ void MAX3421e< SS, INTR >::gpioWr(uint8_t data) { } /* single host register read */ -template< typename SS, typename INTR > -uint8_t MAX3421e< SS, INTR >::regRd(uint8_t reg) { +template< typename SPI_SS, typename INTR > +uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) { XMEM_ACQUIRE_SPI(); - SS::Clear(); + SPI_SS::Clear(); #if USING_SPI4TEENSY3 spi4teensy3::send(reg); uint8_t rv = spi4teensy3::receive(); - SS::Set(); + SPI_SS::Set(); #else SPDR = reg; while(!(SPSR & (1 << SPIF))); SPDR = 0; //send empty byte while(!(SPSR & (1 << SPIF))); - SS::Set(); + SPI_SS::Set(); uint8_t rv = SPDR; #endif XMEM_RELEASE_SPI(); @@ -199,10 +199,10 @@ uint8_t MAX3421e< SS, INTR >::regRd(uint8_t reg) { /* multiple-byte register read */ /* returns a pointer to a memory position after last read */ -template< typename SS, typename INTR > -uint8_t* MAX3421e< SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) { +template< typename SPI_SS, typename INTR > +uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) { XMEM_ACQUIRE_SPI(); - SS::Clear(); + SPI_SS::Clear(); #if USING_SPI4TEENSY3 spi4teensy3::send(reg); spi4teensy3::receive(data_p, nbytes); @@ -227,15 +227,15 @@ uint8_t* MAX3421e< SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* dat } #endif #endif - SS::Set(); + SPI_SS::Set(); XMEM_RELEASE_SPI(); return( data_p); } /* GPIO read. See gpioWr for explanation */ /* GPIN pins are in high nibbles of IOPINS1, IOPINS2 */ -template< typename SS, typename INTR > -uint8_t MAX3421e< SS, INTR >::gpioRd() { +template< typename SPI_SS, typename INTR > +uint8_t MAX3421e< SPI_SS, INTR >::gpioRd() { uint8_t gpin = 0; gpin = regRd(rIOPINS2); //pins 4-7 gpin &= 0xf0; //clean lower nibble @@ -245,8 +245,8 @@ uint8_t MAX3421e< SS, INTR >::gpioRd() { /* reset MAX3421E. Returns number of cycles it took for PLL to stabilize after reset or zero if PLL haven't stabilized in 65535 cycles */ -template< typename SS, typename INTR > -uint16_t MAX3421e< SS, INTR >::reset() { +template< typename SPI_SS, typename INTR > +uint16_t MAX3421e< SPI_SS, INTR >::reset() { uint16_t i = 0; regWr(rUSBCTL, bmCHIPRES); regWr(rUSBCTL, 0x00); @@ -259,15 +259,15 @@ uint16_t MAX3421e< SS, INTR >::reset() { } /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */ -template< typename SS, typename INTR > -int8_t MAX3421e< SS, INTR >::Init() { +template< typename SPI_SS, typename INTR > +int8_t MAX3421e< SPI_SS, INTR >::Init() { XMEM_ACQUIRE_SPI(); // Moved here. // you really should not init hardware in the constructor when it involves locks. // Also avoids the vbus flicker issue confusing some devices. /* pin and peripheral setup */ - SS::SetDirWrite(); - SS::Set(); + SPI_SS::SetDirWrite(); + SPI_SS::Set(); spi::init(); INTR::SetDirRead(); XMEM_RELEASE_SPI(); @@ -296,15 +296,15 @@ int8_t MAX3421e< SS, INTR >::Init() { } /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */ -template< typename SS, typename INTR > -int8_t MAX3421e< SS, INTR >::Init(int mseconds) { +template< typename SPI_SS, typename INTR > +int8_t MAX3421e< SPI_SS, INTR >::Init(int mseconds) { XMEM_ACQUIRE_SPI(); // Moved here. // you really should not init hardware in the constructor when it involves locks. // Also avoids the vbus flicker issue confusing some devices. /* pin and peripheral setup */ - SS::SetDirWrite(); - SS::Set(); + SPI_SS::SetDirWrite(); + SPI_SS::Set(); spi::init(); INTR::SetDirRead(); XMEM_RELEASE_SPI(); @@ -340,8 +340,8 @@ int8_t MAX3421e< SS, INTR >::Init(int mseconds) { } /* probe bus to determine device presence and speed and switch host to this speed */ -template< typename SS, typename INTR > -void MAX3421e< SS, INTR >::busprobe() { +template< typename SPI_SS, typename INTR > +void MAX3421e< SPI_SS, INTR >::busprobe() { uint8_t bus_sample; bus_sample = regRd(rHRSL); //Get J,K status bus_sample &= (bmJSTATUS | bmKSTATUS); //zero the rest of the byte @@ -375,8 +375,8 @@ void MAX3421e< SS, INTR >::busprobe() { } /* MAX3421 state change task and interrupt handler */ -template< typename SS, typename INTR > -uint8_t MAX3421e< SS, INTR >::Task(void) { +template< typename SPI_SS, typename INTR > +uint8_t MAX3421e< SPI_SS, INTR >::Task(void) { uint8_t rcode = 0; uint8_t pinvalue; //USB_HOST_SERIAL.print("Vbus state: "); @@ -394,8 +394,8 @@ uint8_t MAX3421e< SS, INTR >::Task(void) { return( rcode); } -template< typename SS, typename INTR > -uint8_t MAX3421e< SS, INTR >::IntHandler() { +template< typename SPI_SS, typename INTR > +uint8_t MAX3421e< SPI_SS, INTR >::IntHandler() { uint8_t HIRQ; uint8_t HIRQ_sendback = 0x00; HIRQ = regRd(rHIRQ); //determine interrupt source @@ -410,8 +410,8 @@ uint8_t MAX3421e< SS, INTR >::IntHandler() { regWr(rHIRQ, HIRQ_sendback); return( HIRQ_sendback); } -//template< typename SS, typename INTR > -//uint8_t MAX3421e< SS, INTR >::GpxHandler() +//template< typename SPI_SS, typename INTR > +//uint8_t MAX3421e< SPI_SS, INTR >::GpxHandler() //{ // uint8_t GPINIRQ = regRd( rGPINIRQ ); //read GPIN IRQ register //// if( GPINIRQ & bmGPINIRQ7 ) { //vbus overload