USB Host Shield 2.0
usbhost.h
Go to the documentation of this file.
1 /* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
2 
3 This program is free software; you can redistribute it and/or modify
4 it under the terms of the GNU General Public License as published by
5 the Free Software Foundation; either version 2 of the License, or
6 (at your option) any later version.
7 
8 This program is distributed in the hope that it will be useful,
9 but WITHOUT ANY WARRANTY; without even the implied warranty of
10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 GNU General Public License for more details.
12 
13 You should have received a copy of the GNU General Public License
14 along with this program; if not, write to the Free Software
15 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 
17 Contact information
18 -------------------
19 
20 Circuits At Home, LTD
21 Web : http://www.circuitsathome.com
22 e-mail : support@circuitsathome.com
23  */
24 /* MAX3421E-based USB Host Library header file */
25 
26 
27 #if !defined(_usb_h_) || defined(_USBHOST_H_)
28 #error "Never include usbhost.h directly; include Usb.h instead"
29 #else
30 #define _USBHOST_H_
31 
32 #if USING_SPI4TEENSY3
33 #include <spi4teensy3.h>
34 #include <sys/types.h>
35 #endif
36 
37 /* SPI initialization */
38 template< typename SPI_CLK, typename SPI_MOSI, typename SPI_MISO, typename SPI_SS > class SPi {
39 public:
40 #if USING_SPI4TEENSY3
41  static void init() {
42  // spi4teensy3 inits everything for us, except /SS
43  // CLK, MOSI and MISO are hard coded for now.
44  // spi4teensy3::init(0,0,0); // full speed, cpol 0, cpha 0
45  spi4teensy3::init(); // full speed, cpol 0, cpha 0
46  SPI_SS::SetDirWrite();
47  SPI_SS::Set();
48  }
49 #elif defined(SPI_HAS_TRANSACTION)
50  static void init() {
51  USB_SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
52  SPI_SS::SetDirWrite();
53  SPI_SS::Set();
54  }
55 #elif defined(STM32F4)
56 #warning "You need to initialize the SPI interface manually when using the STM32F4 platform"
57  static void init() {
58  // Should be initialized by the user manually for now
59  }
60 #elif !defined(SPDR)
61  static void init() {
62  SPI_SS::SetDirWrite();
63  SPI_SS::Set();
64  USB_SPI.begin();
65 #if defined(__MIPSEL__)
66  USB_SPI.setClockDivider(1);
67 #elif defined(__ARDUINO_X86__)
68  #ifdef SPI_CLOCK_1M // Hack used to check if setClockSpeed is available
69  USB_SPI.setClockSpeed(12000000); // The MAX3421E can handle up to 26MHz, but in practice this was the maximum that I could reliably use
70  #else
71  USB_SPI.setClockDivider(SPI_CLOCK_DIV2); // This will set the SPI frequency to 8MHz - it could be higher, but it is not supported in the old API
72  #endif
73 #elif !defined(RBL_NRF51822)
74  USB_SPI.setClockDivider(4); // Set speed to 84MHz/4=21MHz - the MAX3421E can handle up to 26MHz
75 #endif
76  }
77 #else
78  static void init() {
79  //uint8_t tmp;
80  SPI_CLK::SetDirWrite();
81  SPI_MOSI::SetDirWrite();
82  SPI_MISO::SetDirRead();
83  SPI_SS::SetDirWrite();
84  /* mode 00 (CPOL=0, CPHA=0) master, fclk/2. Mode 11 (CPOL=11, CPHA=11) is also supported by MAX3421E */
85  SPCR = 0x50;
86  SPSR = 0x01; // 0x01
87 
88  //tmp = SPSR;
89  //tmp = SPDR;
90  }
91 #endif
92 };
93 
94 /* SPI pin definitions. see avrpins.h */
95 #if defined(PIN_SPI_SCK) && defined(PIN_SPI_MOSI) && defined(PIN_SPI_MISO) && defined(PIN_SPI_SS)
96 // Use pin defines: https://github.com/arduino/Arduino/pull/4814
97 // Based on: https://www.mikeash.com/pyblog/friday-qa-2015-03-20-preprocessor-abuse-and-optional-parentheses.html
98 #define NOTHING_EXTRACT
99 #define EXTRACT(...) EXTRACT __VA_ARGS__
100 #define PASTE(x, ...) x ## __VA_ARGS__
101 #define EVALUATING_PASTE(x, ...) PASTE(x, __VA_ARGS__)
102 #define UNPAREN(x) EVALUATING_PASTE(NOTHING_, EXTRACT x)
103 #define APPEND_PIN(pin) P ## pin // Appends the pin to 'P', e.g. 1 becomes P1
104 #define MAKE_PIN(x) EVALUATING_PASTE(APPEND_, PIN(UNPAREN(x)))
106 #undef MAKE_PIN
107 #elif defined(__AVR_ATmega1280__) || (__AVR_ATmega2560__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
108 typedef SPi< Pb1, Pb2, Pb3, Pb0 > spi;
109 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
110 typedef SPi< Pb5, Pb3, Pb4, Pb2 > spi;
111 #elif defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284__) || defined(__AVR_ATmega1284P__)
112 typedef SPi< Pb7, Pb5, Pb6, Pb4 > spi;
113 #elif (defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__))) || defined(__ARDUINO_ARC__) || defined(__ARDUINO_X86__) || defined(__MIPSEL__) || defined(STM32F4)
114 typedef SPi< P13, P11, P12, P10 > spi;
115 #elif defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
116 typedef SPi< P76, P75, P74, P10 > spi;
117 #elif defined(RBL_NRF51822)
118 typedef SPi< P16, P18, P17, P10 > spi;
119 #elif defined(ESP8266)
120 typedef SPi< P14, P13, P12, P15 > spi;
121 #elif defined(ESP32)
122 typedef SPi< P18, P23, P19, P5 > spi;
123 #else
124 #error "No SPI entry in usbhost.h"
125 #endif
126 
127 typedef enum {
128  vbus_on = 0,
130 } VBUS_t;
131 
132 template< typename SPI_SS, typename INTR > class MAX3421e /* : public spi */ {
133  static uint8_t vbusState;
134 
135 public:
136  MAX3421e();
137  void regWr(uint8_t reg, uint8_t data);
138  uint8_t* bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
139  void gpioWr(uint8_t data);
140  uint8_t regRd(uint8_t reg);
141  uint8_t* bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
142  uint8_t gpioRd();
143  uint8_t gpioRdOutput();
144  uint16_t reset();
145  int8_t Init();
146  int8_t Init(int mseconds);
147 
148  void vbusPower(VBUS_t state) {
149  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | state));
150  }
151 
152  uint8_t getVbusState(void) {
153  return vbusState;
154  };
155  void busprobe();
156  uint8_t GpxHandler();
157  uint8_t IntHandler();
158  uint8_t Task();
159 };
160 
161 template< typename SPI_SS, typename INTR >
163 
164 /* constructor */
165 template< typename SPI_SS, typename INTR >
167  // Leaving ADK hardware setup in here, for now. This really belongs with the other parts.
168 #ifdef BOARD_MEGA_ADK
169  // For Mega ADK, which has a Max3421e on-board, set MAX_RESET to output mode, and then set it to HIGH
170  P55::SetDirWrite();
171  P55::Set();
172 #endif
173 };
174 
175 /* write single byte into MAX3421 register */
176 template< typename SPI_SS, typename INTR >
177 void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
179 #if defined(SPI_HAS_TRANSACTION)
180  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
181 #endif
182  SPI_SS::Clear();
183 
184 #if USING_SPI4TEENSY3
185  uint8_t c[2];
186  c[0] = reg | 0x02;
187  c[1] = data;
188  spi4teensy3::send(c, 2);
189 #elif defined(SPI_HAS_TRANSACTION) && !defined(ESP8266) && !defined(ESP32)
190  uint8_t c[2];
191  c[0] = reg | 0x02;
192  c[1] = data;
193  USB_SPI.transfer(c, 2);
194 #elif defined(STM32F4)
195  uint8_t c[2];
196  c[0] = reg | 0x02;
197  c[1] = data;
198  HAL_SPI_Transmit(&SPI_Handle, c, 2, HAL_MAX_DELAY);
199 #elif !defined(SPDR) // ESP8266, ESP32
200  USB_SPI.transfer(reg | 0x02);
201  USB_SPI.transfer(data);
202 #else
203  SPDR = (reg | 0x02);
204  while(!(SPSR & (1 << SPIF)));
205  SPDR = data;
206  while(!(SPSR & (1 << SPIF)));
207 #endif
208 
209  SPI_SS::Set();
210 #if defined(SPI_HAS_TRANSACTION)
211  USB_SPI.endTransaction();
212 #endif
214  return;
215 };
216 /* multiple-byte write */
217 
218 /* returns a pointer to memory position after last written */
219 template< typename SPI_SS, typename INTR >
220 uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
222 #if defined(SPI_HAS_TRANSACTION)
223  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
224 #endif
225  SPI_SS::Clear();
226 
227 #if USING_SPI4TEENSY3
228  spi4teensy3::send(reg | 0x02);
229  spi4teensy3::send(data_p, nbytes);
230  data_p += nbytes;
231 #elif defined(STM32F4)
232  uint8_t data = reg | 0x02;
233  HAL_SPI_Transmit(&SPI_Handle, &data, 1, HAL_MAX_DELAY);
234  HAL_SPI_Transmit(&SPI_Handle, data_p, nbytes, HAL_MAX_DELAY);
235  data_p += nbytes;
236 #elif !defined(__AVR__) || !defined(SPDR)
237 #if defined(ESP8266) || defined(ESP32)
238  yield();
239 #endif
240  USB_SPI.transfer(reg | 0x02);
241  while(nbytes) {
242  USB_SPI.transfer(*data_p);
243  nbytes--;
244  data_p++; // advance data pointer
245  }
246 #else
247  SPDR = (reg | 0x02); //set WR bit and send register number
248  while(nbytes) {
249  while(!(SPSR & (1 << SPIF))); //check if previous byte was sent
250  SPDR = (*data_p); // send next data byte
251  nbytes--;
252  data_p++; // advance data pointer
253  }
254  while(!(SPSR & (1 << SPIF)));
255 #endif
256 
257  SPI_SS::Set();
258 #if defined(SPI_HAS_TRANSACTION)
259  USB_SPI.endTransaction();
260 #endif
262  return ( data_p);
263 }
264 /* GPIO write */
265 /*GPIO byte is split between 2 registers, so two writes are needed to write one byte */
266 
267 /* GPOUT bits are in the low nibble. 0-3 in IOPINS1, 4-7 in IOPINS2 */
268 template< typename SPI_SS, typename INTR >
270  regWr(rIOPINS1, data);
271  data >>= 4;
272  regWr(rIOPINS2, data);
273  return;
274 }
275 
276 /* single host register read */
277 template< typename SPI_SS, typename INTR >
278 uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
280 #if defined(SPI_HAS_TRANSACTION)
281  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
282 #endif
283  SPI_SS::Clear();
284 
285 #if USING_SPI4TEENSY3
286  spi4teensy3::send(reg);
287  uint8_t rv = spi4teensy3::receive();
288  SPI_SS::Set();
289 #elif defined(STM32F4)
290  HAL_SPI_Transmit(&SPI_Handle, &reg, 1, HAL_MAX_DELAY);
291  uint8_t rv = 0;
292  HAL_SPI_Receive(&SPI_Handle, &rv, 1, HAL_MAX_DELAY);
293  SPI_SS::Set();
294 #elif !defined(SPDR) || defined(SPI_HAS_TRANSACTION)
295  USB_SPI.transfer(reg);
296  uint8_t rv = USB_SPI.transfer(0); // Send empty byte
297  SPI_SS::Set();
298 #else
299  SPDR = reg;
300  while(!(SPSR & (1 << SPIF)));
301  SPDR = 0; // Send empty byte
302  while(!(SPSR & (1 << SPIF)));
303  SPI_SS::Set();
304  uint8_t rv = SPDR;
305 #endif
306 
307 #if defined(SPI_HAS_TRANSACTION)
308  USB_SPI.endTransaction();
309 #endif
311  return (rv);
312 }
313 /* multiple-byte register read */
314 
315 /* returns a pointer to a memory position after last read */
316 template< typename SPI_SS, typename INTR >
317 uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
319 #if defined(SPI_HAS_TRANSACTION)
320  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
321 #endif
322  SPI_SS::Clear();
323 
324 #if USING_SPI4TEENSY3
325  spi4teensy3::send(reg);
326  spi4teensy3::receive(data_p, nbytes);
327  data_p += nbytes;
328 #elif defined(SPI_HAS_TRANSACTION) && !defined(ESP8266) && !defined(ESP32)
329  USB_SPI.transfer(reg);
330  memset(data_p, 0, nbytes); // Make sure we send out empty bytes
331  USB_SPI.transfer(data_p, nbytes);
332  data_p += nbytes;
333 #elif defined(__ARDUINO_X86__)
334  USB_SPI.transfer(reg);
335  USB_SPI.transferBuffer(NULL, data_p, nbytes);
336  data_p += nbytes;
337 #elif defined(STM32F4)
338  HAL_SPI_Transmit(&SPI_Handle, &reg, 1, HAL_MAX_DELAY);
339  memset(data_p, 0, nbytes); // Make sure we send out empty bytes
340  HAL_SPI_Receive(&SPI_Handle, data_p, nbytes, HAL_MAX_DELAY);
341  data_p += nbytes;
342 #elif !defined(SPDR) // ESP8266, ESP32
343  yield();
344  USB_SPI.transfer(reg);
345  while(nbytes) {
346  *data_p++ = USB_SPI.transfer(0);
347  nbytes--;
348  }
349 #else
350  SPDR = reg;
351  while(!(SPSR & (1 << SPIF))); //wait
352  while(nbytes) {
353  SPDR = 0; // Send empty byte
354  nbytes--;
355  while(!(SPSR & (1 << SPIF)));
356 #if 0
357  {
358  *data_p = SPDR;
359  printf("%2.2x ", *data_p);
360  }
361  data_p++;
362  }
363  printf("\r\n");
364 #else
365  *data_p++ = SPDR;
366  }
367 #endif
368 #endif
369 
370  SPI_SS::Set();
371 #if defined(SPI_HAS_TRANSACTION)
372  USB_SPI.endTransaction();
373 #endif
375  return ( data_p);
376 }
377 /* GPIO read. See gpioWr for explanation */
378 
382 /* GPIN pins are in high nibbles of IOPINS1, IOPINS2 */
383 template< typename SPI_SS, typename INTR >
385  uint8_t gpin = 0;
386  gpin = regRd(rIOPINS2); //pins 4-7
387  gpin &= 0xf0; //clean lower nibble
388  gpin |= (regRd(rIOPINS1) >> 4); //shift low bits and OR with upper from previous operation.
389  return ( gpin);
390 }
391 
395 /* GPOUT pins are in low nibbles of IOPINS1, IOPINS2 */
396 template< typename SPI_SS, typename INTR >
398  uint8_t gpout = 0;
399  gpout = regRd(rIOPINS1); //pins 0-3
400  gpout &= 0x0f; //clean upper nibble
401  gpout |= (regRd(rIOPINS2) << 4); //shift high bits and OR with lower from previous operation.
402  return ( gpout);
403 }
404 
405 /* reset MAX3421E. Returns number of cycles it took for PLL to stabilize after reset
406  or zero if PLL haven't stabilized in 65535 cycles */
407 template< typename SPI_SS, typename INTR >
409  uint16_t i = 0;
410  regWr(rUSBCTL, bmCHIPRES);
411  regWr(rUSBCTL, 0x00);
412  while(++i) {
413  if((regRd(rUSBIRQ) & bmOSCOKIRQ)) {
414  break;
415  }
416  }
417  return ( i);
418 }
419 
420 /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */
421 template< typename SPI_SS, typename INTR >
424  // Moved here.
425  // you really should not init hardware in the constructor when it involves locks.
426  // Also avoids the vbus flicker issue confusing some devices.
427  /* pin and peripheral setup */
428  SPI_SS::SetDirWrite();
429  SPI_SS::Set();
430  spi::init();
431  INTR::SetDirRead();
433  /* MAX3421E - full-duplex SPI, level interrupt */
434  // GPX pin on. Moved here, otherwise we flicker the vbus.
435  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL));
436 
437  if(reset() == 0) { //OSCOKIRQ hasn't asserted in time
438  return ( -1);
439  }
440 
441  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
442 
443  regWr(rHIEN, bmCONDETIE | bmFRAMEIE); //connection detection
444 
445  /* check if device is connected */
446  regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
447  while(!(regRd(rHCTL) & bmSAMPLEBUS)); //wait for sample operation to finish
448 
449  busprobe(); //check if anything is connected
450 
451  regWr(rHIRQ, bmCONDETIRQ); //clear connection detect interrupt
452  regWr(rCPUCTL, 0x01); //enable interrupt pin
453 
454  return ( 0);
455 }
456 
457 /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */
458 template< typename SPI_SS, typename INTR >
459 int8_t MAX3421e< SPI_SS, INTR >::Init(int mseconds) {
461  // Moved here.
462  // you really should not init hardware in the constructor when it involves locks.
463  // Also avoids the vbus flicker issue confusing some devices.
464  /* pin and peripheral setup */
465  SPI_SS::SetDirWrite();
466  SPI_SS::Set();
467  spi::init();
468  INTR::SetDirRead();
470  /* MAX3421E - full-duplex SPI, level interrupt, vbus off */
471  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | GPX_VBDET));
472 
473  if(reset() == 0) { //OSCOKIRQ hasn't asserted in time
474  return ( -1);
475  }
476 
477  // Delay a minimum of 1 second to ensure any capacitors are drained.
478  // 1 second is required to make sure we do not smoke a Microdrive!
479  if(mseconds < 1000) mseconds = 1000;
480  delay(mseconds);
481 
482  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
483 
484  regWr(rHIEN, bmCONDETIE | bmFRAMEIE); //connection detection
485 
486  /* check if device is connected */
487  regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
488  while(!(regRd(rHCTL) & bmSAMPLEBUS)); //wait for sample operation to finish
489 
490  busprobe(); //check if anything is connected
491 
492  regWr(rHIRQ, bmCONDETIRQ); //clear connection detect interrupt
493  regWr(rCPUCTL, 0x01); //enable interrupt pin
494 
495  // GPX pin on. This is done here so that busprobe will fail if we have a switch connected.
496  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL));
497 
498  return ( 0);
499 }
500 
501 /* probe bus to determine device presence and speed and switch host to this speed */
502 template< typename SPI_SS, typename INTR >
504  uint8_t bus_sample;
505  bus_sample = regRd(rHRSL); //Get J,K status
506  bus_sample &= (bmJSTATUS | bmKSTATUS); //zero the rest of the byte
507  switch(bus_sample) { //start full-speed or low-speed host
508  case( bmJSTATUS):
509  if((regRd(rMODE) & bmLOWSPEED) == 0) {
510  regWr(rMODE, MODE_FS_HOST); //start full-speed host
511  vbusState = FSHOST;
512  } else {
513  regWr(rMODE, MODE_LS_HOST); //start low-speed host
514  vbusState = LSHOST;
515  }
516  break;
517  case( bmKSTATUS):
518  if((regRd(rMODE) & bmLOWSPEED) == 0) {
519  regWr(rMODE, MODE_LS_HOST); //start low-speed host
520  vbusState = LSHOST;
521  } else {
522  regWr(rMODE, MODE_FS_HOST); //start full-speed host
523  vbusState = FSHOST;
524  }
525  break;
526  case( bmSE1): //illegal state
527  vbusState = SE1;
528  break;
529  case( bmSE0): //disconnected state
530  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST | bmSEPIRQ);
531  vbusState = SE0;
532  break;
533  }//end switch( bus_sample )
534 }
535 
536 /* MAX3421 state change task and interrupt handler */
537 template< typename SPI_SS, typename INTR >
539  uint8_t rcode = 0;
540  uint8_t pinvalue;
541  //USB_HOST_SERIAL.print("Vbus state: ");
542  //USB_HOST_SERIAL.println( vbusState, HEX );
543  pinvalue = INTR::IsSet(); //Read();
544  //pinvalue = digitalRead( MAX_INT );
545  if(pinvalue == 0) {
546  rcode = IntHandler();
547  }
548  // pinvalue = digitalRead( MAX_GPX );
549  // if( pinvalue == LOW ) {
550  // GpxHandler();
551  // }
552  // usbSM(); //USB state machine
553  return ( rcode);
554 }
555 
556 template< typename SPI_SS, typename INTR >
558  uint8_t HIRQ;
559  uint8_t HIRQ_sendback = 0x00;
560  HIRQ = regRd(rHIRQ); //determine interrupt source
561  //if( HIRQ & bmFRAMEIRQ ) { //->1ms SOF interrupt handler
562  // HIRQ_sendback |= bmFRAMEIRQ;
563  //}//end FRAMEIRQ handling
564  if(HIRQ & bmCONDETIRQ) {
565  busprobe();
566  HIRQ_sendback |= bmCONDETIRQ;
567  }
568  /* End HIRQ interrupts handling, clear serviced IRQs */
569  regWr(rHIRQ, HIRQ_sendback);
570  return ( HIRQ_sendback);
571 }
572 //template< typename SPI_SS, typename INTR >
573 //uint8_t MAX3421e< SPI_SS, INTR >::GpxHandler()
574 //{
575 // uint8_t GPINIRQ = regRd( rGPINIRQ ); //read GPIN IRQ register
582 // return( GPINIRQ );
583 //}
584 
585 #endif // _USBHOST_H_
#define GPX_VBDET
Definition: max3421e.h:82
#define rIOPINS1
Definition: max3421e.h:88
void busprobe()
Definition: usbhost.h:503
#define rHIEN
Definition: max3421e.h:155
#define FSHOST
Definition: max3421e.h:37
#define rHCTL
Definition: max3421e.h:181
#define bmCONDETIRQ
Definition: max3421e.h:151
#define bmCONDETIE
Definition: max3421e.h:163
#define bmSE1
Definition: max3421e.h:211
#define bmCHIPRES
Definition: max3421e.h:64
uint8_t getVbusState(void)
Definition: usbhost.h:152
#define rCPUCTL
Definition: max3421e.h:67
#define bmJSTATUS
Definition: max3421e.h:209
uint16_t reset()
Definition: usbhost.h:408
#define MODE_LS_HOST
Definition: max3421e.h:232
uint8_t gpioRdOutput()
Reads the current GPI output values.
Definition: usbhost.h:397
#define bmINTLEVEL
Definition: max3421e.h:76
void gpioWr(uint8_t data)
Definition: usbhost.h:269
uint8_t Task()
Definition: usbhost.h:538
#define rUSBCTL
Definition: max3421e.h:62
#define bmSE0
Definition: max3421e.h:210
#define bmHOST
Definition: max3421e.h:170
#define bmSEPIRQ
Definition: max3421e.h:174
uint8_t gpioRd()
Reads the current GPI input values.
Definition: usbhost.h:384
int8_t Init()
Definition: usbhost.h:422
#define LSHOST
Definition: max3421e.h:38
#define rMODE
Definition: max3421e.h:167
#define MODE_FS_HOST
Definition: max3421e.h:231
void vbusPower(VBUS_t state)
Definition: usbhost.h:148
#define bmKSTATUS
Definition: max3421e.h:208
#define rHRSL
Definition: max3421e.h:203
uint8_t * bytesRd(uint8_t reg, uint8_t nbytes, uint8_t *data_p)
Definition: usbhost.h:317
#define XMEM_ACQUIRE_SPI()
Definition: settings.h:136
#define bmLOWSPEED
Definition: max3421e.h:171
uint8_t * bytesWr(uint8_t reg, uint8_t nbytes, uint8_t *data_p)
Definition: usbhost.h:220
Definition: usbhost.h:38
#define rHIRQ
Definition: max3421e.h:144
#define rUSBIRQ
Definition: max3421e.h:50
#define XMEM_RELEASE_SPI()
Definition: settings.h:137
#define bmFDUPSPI
Definition: max3421e.h:75
#define rPINCTL
Definition: max3421e.h:73
VBUS_t
Definition: usbhost.h:127
void regWr(uint8_t reg, uint8_t data)
Definition: usbhost.h:177
#define bmFRAMEIE
Definition: max3421e.h:164
uint8_t IntHandler()
Definition: usbhost.h:557
#define bmOSCOKIRQ
Definition: max3421e.h:54
uint8_t regRd(uint8_t reg)
Definition: usbhost.h:278
MAX3421e()
Definition: usbhost.h:166
#define USB_SPI
Definition: settings.h:33
#define SE0
Definition: max3421e.h:35
#define rIOPINS2
Definition: max3421e.h:100
#define bmDMPULLDN
Definition: max3421e.h:176
#define SE1
Definition: max3421e.h:36
#define bmSAMPLEBUS
Definition: max3421e.h:185
static void init()
Definition: usbhost.h:61
#define bmDPPULLDN
Definition: max3421e.h:177