USB Host Shield 2.0
usbhost.h
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1 /* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
2 
3 This program is free software; you can redistribute it and/or modify
4 it under the terms of the GNU General Public License as published by
5 the Free Software Foundation; either version 2 of the License, or
6 (at your option) any later version.
7 
8 This program is distributed in the hope that it will be useful,
9 but WITHOUT ANY WARRANTY; without even the implied warranty of
10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 GNU General Public License for more details.
12 
13 You should have received a copy of the GNU General Public License
14 along with this program; if not, write to the Free Software
15 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 
17 Contact information
18 -------------------
19 
20 Circuits At Home, LTD
21 Web : http://www.circuitsathome.com
22 e-mail : support@circuitsathome.com
23  */
24 /* MAX3421E-based USB Host Library header file */
25 
26 
27 #if !defined(_usb_h_) || defined(_USBHOST_H_)
28 #error "Never include usbhost.h directly; include Usb.h instead"
29 #else
30 #define _USBHOST_H_
31 
32 #if USING_SPI4TEENSY3
33 #include <spi4teensy3.h>
34 #include <sys/types.h>
35 #endif
36 
37 /* SPI initialization */
38 template< typename SPI_CLK, typename SPI_MOSI, typename SPI_MISO, typename SPI_SS > class SPi {
39 public:
40 #if USING_SPI4TEENSY3
41  static void init() {
42  // spi4teensy3 inits everything for us, except /SS
43  // CLK, MOSI and MISO are hard coded for now.
44  // spi4teensy3::init(0,0,0); // full speed, cpol 0, cpha 0
45  spi4teensy3::init(); // full speed, cpol 0, cpha 0
46  SPI_SS::SetDirWrite();
47  SPI_SS::Set();
48  }
49 #elif defined(SPI_HAS_TRANSACTION)
50  static void init() {
51  USB_SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
52  SPI_SS::SetDirWrite();
53  SPI_SS::Set();
54  }
55 #elif defined(STM32F4)
56 #warning "You need to initialize the SPI interface manually when using the STM32F4 platform"
57  static void init() {
58  // Should be initialized by the user manually for now
59  }
60 #elif !defined(SPDR)
61  static void init() {
62  SPI_SS::SetDirWrite();
63  SPI_SS::Set();
64  USB_SPI.begin();
65 #if defined(__MIPSEL__)
66  USB_SPI.setClockDivider(1);
67 #elif defined(__ARDUINO_X86__)
68  #ifdef SPI_CLOCK_1M // Hack used to check if setClockSpeed is available
69  USB_SPI.setClockSpeed(12000000); // The MAX3421E can handle up to 26MHz, but in practice this was the maximum that I could reliably use
70  #else
71  USB_SPI.setClockDivider(SPI_CLOCK_DIV2); // This will set the SPI frequency to 8MHz - it could be higher, but it is not supported in the old API
72  #endif
73 #elif !defined(RBL_NRF51822) && !defined(NRF52_SERIES)
74  USB_SPI.setClockDivider(4); // Set speed to 84MHz/4=21MHz - the MAX3421E can handle up to 26MHz
75 #endif
76  }
77 #else
78  static void init() {
79  //uint8_t tmp;
80  SPI_CLK::SetDirWrite();
81  SPI_MOSI::SetDirWrite();
82  SPI_MISO::SetDirRead();
83  SPI_SS::SetDirWrite();
84  /* mode 00 (CPOL=0, CPHA=0) master, fclk/2. Mode 11 (CPOL=11, CPHA=11) is also supported by MAX3421E */
85  SPCR = 0x50;
86  SPSR = 0x01; // 0x01
87 
88  //tmp = SPSR;
89  //tmp = SPDR;
90  }
91 #endif
92 };
93 
94 /* SPI pin definitions. see avrpins.h */
95 #if defined(PIN_SPI_SCK) && defined(PIN_SPI_MOSI) && defined(PIN_SPI_MISO) && defined(PIN_SPI_SS)
96 // Use pin defines: https://github.com/arduino/Arduino/pull/4814
97 // Based on: https://www.mikeash.com/pyblog/friday-qa-2015-03-20-preprocessor-abuse-and-optional-parentheses.html
98 #define NOTHING_EXTRACT
99 #define EXTRACT(...) EXTRACT __VA_ARGS__
100 #define PASTE(x, ...) x ## __VA_ARGS__
101 #define EVALUATING_PASTE(x, ...) PASTE(x, __VA_ARGS__)
102 #define UNPAREN(x) EVALUATING_PASTE(NOTHING_, EXTRACT x)
103 #define APPEND_PIN(pin) P ## pin // Appends the pin to 'P', e.g. 1 becomes P1
104 #define MAKE_PIN(x) EVALUATING_PASTE(APPEND_, PIN(UNPAREN(x)))
105 typedef SPi< MAKE_PIN(PIN_SPI_SCK), MAKE_PIN(PIN_SPI_MOSI), MAKE_PIN(PIN_SPI_MISO), MAKE_PIN(PIN_SPI_SS) > spi;
106 #undef MAKE_PIN
107 #elif defined(__AVR_ATmega1280__) || (__AVR_ATmega2560__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
108 typedef SPi< Pb1, Pb2, Pb3, Pb0 > spi;
109 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
110 typedef SPi< Pb5, Pb3, Pb4, Pb2 > spi;
111 #elif defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284__) || defined(__AVR_ATmega1284P__)
112 typedef SPi< Pb7, Pb5, Pb6, Pb4 > spi;
113 #elif (defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__))) || defined(__ARDUINO_ARC__) || defined(__ARDUINO_X86__) || defined(__MIPSEL__) || defined(STM32F4)
114 typedef SPi< P13, P11, P12, P10 > spi;
115 #elif defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
116 typedef SPi< P76, P75, P74, P10 > spi;
117 #elif defined(RBL_NRF51822)
118 typedef SPi< P16, P18, P17, P10 > spi;
119 #elif defined(ESP8266)
120 typedef SPi< P14, P13, P12, P15 > spi;
121 #elif defined(ESP32)
122 typedef SPi< P18, P23, P19, P5 > spi;
123 #elif defined(ARDUINO_NRF52840_FEATHER)
124 typedef SPi< P26, P25, P24, P5 > spi;
125 #else
126 #error "No SPI entry in usbhost.h"
127 #endif
128 
129 typedef enum {
130  vbus_on = 0,
133 
134 template< typename SPI_SS, typename INTR > class MAX3421e /* : public spi */ {
135  static uint8_t vbusState;
136 
137 public:
138  MAX3421e();
139  void regWr(uint8_t reg, uint8_t data);
140  uint8_t* bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
141  void gpioWr(uint8_t data);
142  uint8_t regRd(uint8_t reg);
143  uint8_t* bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
144  uint8_t gpioRd();
145  uint8_t gpioRdOutput();
146  uint16_t reset();
147  int8_t Init();
148  int8_t Init(int mseconds);
149 
150  void vbusPower(VBUS_t state) {
151  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | state));
152  }
153 
154  uint8_t getVbusState(void) {
155  return vbusState;
156  };
157  void busprobe();
158  uint8_t GpxHandler();
159  uint8_t IntHandler();
160  uint8_t Task();
161 };
162 
163 template< typename SPI_SS, typename INTR >
165 
166 /* constructor */
167 template< typename SPI_SS, typename INTR >
169  // Leaving ADK hardware setup in here, for now. This really belongs with the other parts.
170 #ifdef BOARD_MEGA_ADK
171  // For Mega ADK, which has a Max3421e on-board, set MAX_RESET to output mode, and then set it to HIGH
172  P55::SetDirWrite();
173  P55::Set();
174 #endif
175 };
176 
177 /* write single byte into MAX3421 register */
178 template< typename SPI_SS, typename INTR >
179 void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
181 #if defined(SPI_HAS_TRANSACTION)
182  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
183 #endif
184  SPI_SS::Clear();
185 
186 #if USING_SPI4TEENSY3
187  uint8_t c[2];
188  c[0] = reg | 0x02;
189  c[1] = data;
190  spi4teensy3::send(c, 2);
191 #elif defined(SPI_HAS_TRANSACTION) && !defined(ESP8266) && !defined(ESP32)
192  uint8_t c[2];
193  c[0] = reg | 0x02;
194  c[1] = data;
195  USB_SPI.transfer(c, 2);
196 #elif defined(STM32F4)
197  uint8_t c[2];
198  c[0] = reg | 0x02;
199  c[1] = data;
200  HAL_SPI_Transmit(&SPI_Handle, c, 2, HAL_MAX_DELAY);
201 #elif !defined(SPDR) // ESP8266, ESP32
202  USB_SPI.transfer(reg | 0x02);
203  USB_SPI.transfer(data);
204 #else
205  SPDR = (reg | 0x02);
206  while(!(SPSR & (1 << SPIF)));
207  SPDR = data;
208  while(!(SPSR & (1 << SPIF)));
209 #endif
210 
211  SPI_SS::Set();
212 #if defined(SPI_HAS_TRANSACTION)
213  USB_SPI.endTransaction();
214 #endif
216  return;
217 };
218 /* multiple-byte write */
219 
220 /* returns a pointer to memory position after last written */
221 template< typename SPI_SS, typename INTR >
222 uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
224 #if defined(SPI_HAS_TRANSACTION)
225  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
226 #endif
227  SPI_SS::Clear();
228 
229 #if USING_SPI4TEENSY3
230  spi4teensy3::send(reg | 0x02);
231  spi4teensy3::send(data_p, nbytes);
232  data_p += nbytes;
233 #elif defined(STM32F4)
234  uint8_t data = reg | 0x02;
235  HAL_SPI_Transmit(&SPI_Handle, &data, 1, HAL_MAX_DELAY);
236  HAL_SPI_Transmit(&SPI_Handle, data_p, nbytes, HAL_MAX_DELAY);
237  data_p += nbytes;
238 #elif !defined(__AVR__) || !defined(SPDR)
239 #if defined(ESP8266) || defined(ESP32)
240  yield();
241 #endif
242  USB_SPI.transfer(reg | 0x02);
243  while(nbytes) {
244  USB_SPI.transfer(*data_p);
245  nbytes--;
246  data_p++; // advance data pointer
247  }
248 #else
249  SPDR = (reg | 0x02); //set WR bit and send register number
250  while(nbytes) {
251  while(!(SPSR & (1 << SPIF))); //check if previous byte was sent
252  SPDR = (*data_p); // send next data byte
253  nbytes--;
254  data_p++; // advance data pointer
255  }
256  while(!(SPSR & (1 << SPIF)));
257 #endif
258 
259  SPI_SS::Set();
260 #if defined(SPI_HAS_TRANSACTION)
261  USB_SPI.endTransaction();
262 #endif
264  return ( data_p);
265 }
266 /* GPIO write */
267 /*GPIO byte is split between 2 registers, so two writes are needed to write one byte */
268 
269 /* GPOUT bits are in the low nibble. 0-3 in IOPINS1, 4-7 in IOPINS2 */
270 template< typename SPI_SS, typename INTR >
272  regWr(rIOPINS1, data);
273  data >>= 4;
274  regWr(rIOPINS2, data);
275  return;
276 }
277 
278 /* single host register read */
279 template< typename SPI_SS, typename INTR >
280 uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
282 #if defined(SPI_HAS_TRANSACTION)
283  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
284 #endif
285  SPI_SS::Clear();
286 
287 #if USING_SPI4TEENSY3
288  spi4teensy3::send(reg);
289  uint8_t rv = spi4teensy3::receive();
290  SPI_SS::Set();
291 #elif defined(STM32F4)
292  HAL_SPI_Transmit(&SPI_Handle, &reg, 1, HAL_MAX_DELAY);
293  uint8_t rv = 0;
294  HAL_SPI_Receive(&SPI_Handle, &rv, 1, HAL_MAX_DELAY);
295  SPI_SS::Set();
296 #elif !defined(SPDR) || defined(SPI_HAS_TRANSACTION)
297  USB_SPI.transfer(reg);
298  uint8_t rv = USB_SPI.transfer(0); // Send empty byte
299  SPI_SS::Set();
300 #else
301  SPDR = reg;
302  while(!(SPSR & (1 << SPIF)));
303  SPDR = 0; // Send empty byte
304  while(!(SPSR & (1 << SPIF)));
305  SPI_SS::Set();
306  uint8_t rv = SPDR;
307 #endif
308 
309 #if defined(SPI_HAS_TRANSACTION)
310  USB_SPI.endTransaction();
311 #endif
313  return (rv);
314 }
315 /* multiple-byte register read */
316 
317 /* returns a pointer to a memory position after last read */
318 template< typename SPI_SS, typename INTR >
319 uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
321 #if defined(SPI_HAS_TRANSACTION)
322  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
323 #endif
324  SPI_SS::Clear();
325 
326 #if USING_SPI4TEENSY3
327  spi4teensy3::send(reg);
328  spi4teensy3::receive(data_p, nbytes);
329  data_p += nbytes;
330 #elif defined(SPI_HAS_TRANSACTION) && !defined(ESP8266) && !defined(ESP32)
331  USB_SPI.transfer(reg);
332  memset(data_p, 0, nbytes); // Make sure we send out empty bytes
333  USB_SPI.transfer(data_p, nbytes);
334  data_p += nbytes;
335 #elif defined(__ARDUINO_X86__)
336  USB_SPI.transfer(reg);
337  USB_SPI.transferBuffer(NULL, data_p, nbytes);
338  data_p += nbytes;
339 #elif defined(STM32F4)
340  HAL_SPI_Transmit(&SPI_Handle, &reg, 1, HAL_MAX_DELAY);
341  memset(data_p, 0, nbytes); // Make sure we send out empty bytes
342  HAL_SPI_Receive(&SPI_Handle, data_p, nbytes, HAL_MAX_DELAY);
343  data_p += nbytes;
344 #elif !defined(SPDR) // ESP8266, ESP32
345  yield();
346  USB_SPI.transfer(reg);
347  while(nbytes) {
348  *data_p++ = USB_SPI.transfer(0);
349  nbytes--;
350  }
351 #else
352  SPDR = reg;
353  while(!(SPSR & (1 << SPIF))); //wait
354  while(nbytes) {
355  SPDR = 0; // Send empty byte
356  nbytes--;
357  while(!(SPSR & (1 << SPIF)));
358 #if 0
359  {
360  *data_p = SPDR;
361  printf("%2.2x ", *data_p);
362  }
363  data_p++;
364  }
365  printf("\r\n");
366 #else
367  *data_p++ = SPDR;
368  }
369 #endif
370 #endif
371 
372  SPI_SS::Set();
373 #if defined(SPI_HAS_TRANSACTION)
374  USB_SPI.endTransaction();
375 #endif
377  return ( data_p);
378 }
379 /* GPIO read. See gpioWr for explanation */
380 
384 /* GPIN pins are in high nibbles of IOPINS1, IOPINS2 */
385 template< typename SPI_SS, typename INTR >
387  uint8_t gpin = 0;
388  gpin = regRd(rIOPINS2); //pins 4-7
389  gpin &= 0xf0; //clean lower nibble
390  gpin |= (regRd(rIOPINS1) >> 4); //shift low bits and OR with upper from previous operation.
391  return ( gpin);
392 }
393 
397 /* GPOUT pins are in low nibbles of IOPINS1, IOPINS2 */
398 template< typename SPI_SS, typename INTR >
400  uint8_t gpout = 0;
401  gpout = regRd(rIOPINS1); //pins 0-3
402  gpout &= 0x0f; //clean upper nibble
403  gpout |= (regRd(rIOPINS2) << 4); //shift high bits and OR with lower from previous operation.
404  return ( gpout);
405 }
406 
407 /* reset MAX3421E. Returns number of cycles it took for PLL to stabilize after reset
408  or zero if PLL haven't stabilized in 65535 cycles */
409 template< typename SPI_SS, typename INTR >
411  uint16_t i = 0;
412  regWr(rUSBCTL, bmCHIPRES);
413  regWr(rUSBCTL, 0x00);
414  while(++i) {
415  if((regRd(rUSBIRQ) & bmOSCOKIRQ)) {
416  break;
417  }
418  }
419  return ( i);
420 }
421 
422 /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */
423 template< typename SPI_SS, typename INTR >
426  // Moved here.
427  // you really should not init hardware in the constructor when it involves locks.
428  // Also avoids the vbus flicker issue confusing some devices.
429  /* pin and peripheral setup */
430  SPI_SS::SetDirWrite();
431  SPI_SS::Set();
432  spi::init();
433  INTR::SetDirRead();
435  /* MAX3421E - full-duplex SPI, level interrupt */
436  // GPX pin on. Moved here, otherwise we flicker the vbus.
437  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL));
438 
439  if(reset() == 0) { //OSCOKIRQ hasn't asserted in time
440  return ( -1);
441  }
442 
443  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
444 
445  regWr(rHIEN, bmCONDETIE | bmFRAMEIE); //connection detection
446 
447  /* check if device is connected */
448  regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
449  while(!(regRd(rHCTL) & bmSAMPLEBUS)); //wait for sample operation to finish
450 
451  busprobe(); //check if anything is connected
452 
453  regWr(rHIRQ, bmCONDETIRQ); //clear connection detect interrupt
454  regWr(rCPUCTL, 0x01); //enable interrupt pin
455 
456  return ( 0);
457 }
458 
459 /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */
460 template< typename SPI_SS, typename INTR >
461 int8_t MAX3421e< SPI_SS, INTR >::Init(int mseconds) {
463  // Moved here.
464  // you really should not init hardware in the constructor when it involves locks.
465  // Also avoids the vbus flicker issue confusing some devices.
466  /* pin and peripheral setup */
467  SPI_SS::SetDirWrite();
468  SPI_SS::Set();
469  spi::init();
470  INTR::SetDirRead();
472  /* MAX3421E - full-duplex SPI, level interrupt, vbus off */
473  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | GPX_VBDET));
474 
475  if(reset() == 0) { //OSCOKIRQ hasn't asserted in time
476  return ( -1);
477  }
478 
479  // Delay a minimum of 1 second to ensure any capacitors are drained.
480  // 1 second is required to make sure we do not smoke a Microdrive!
481  if(mseconds < 1000) mseconds = 1000;
482  delay(mseconds);
483 
484  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
485 
486  regWr(rHIEN, bmCONDETIE | bmFRAMEIE); //connection detection
487 
488  /* check if device is connected */
489  regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
490  while(!(regRd(rHCTL) & bmSAMPLEBUS)); //wait for sample operation to finish
491 
492  busprobe(); //check if anything is connected
493 
494  regWr(rHIRQ, bmCONDETIRQ); //clear connection detect interrupt
495  regWr(rCPUCTL, 0x01); //enable interrupt pin
496 
497  // GPX pin on. This is done here so that busprobe will fail if we have a switch connected.
498  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL));
499 
500  return ( 0);
501 }
502 
503 /* probe bus to determine device presence and speed and switch host to this speed */
504 template< typename SPI_SS, typename INTR >
506  uint8_t bus_sample;
507  bus_sample = regRd(rHRSL); //Get J,K status
508  bus_sample &= (bmJSTATUS | bmKSTATUS); //zero the rest of the byte
509  switch(bus_sample) { //start full-speed or low-speed host
510  case( bmJSTATUS):
511  if((regRd(rMODE) & bmLOWSPEED) == 0) {
512  regWr(rMODE, MODE_FS_HOST); //start full-speed host
513  vbusState = FSHOST;
514  } else {
515  regWr(rMODE, MODE_LS_HOST); //start low-speed host
516  vbusState = LSHOST;
517  }
518  break;
519  case( bmKSTATUS):
520  if((regRd(rMODE) & bmLOWSPEED) == 0) {
521  regWr(rMODE, MODE_LS_HOST); //start low-speed host
522  vbusState = LSHOST;
523  } else {
524  regWr(rMODE, MODE_FS_HOST); //start full-speed host
525  vbusState = FSHOST;
526  }
527  break;
528  case( bmSE1): //illegal state
529  vbusState = SE1;
530  break;
531  case( bmSE0): //disconnected state
532  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST | bmSEPIRQ);
533  vbusState = SE0;
534  break;
535  }//end switch( bus_sample )
536 }
537 
538 /* MAX3421 state change task and interrupt handler */
539 template< typename SPI_SS, typename INTR >
541  uint8_t rcode = 0;
542  uint8_t pinvalue;
543  //USB_HOST_SERIAL.print("Vbus state: ");
544  //USB_HOST_SERIAL.println( vbusState, HEX );
545  pinvalue = INTR::IsSet(); //Read();
546  //pinvalue = digitalRead( MAX_INT );
547  if(pinvalue == 0) {
548  rcode = IntHandler();
549  }
550  // pinvalue = digitalRead( MAX_GPX );
551  // if( pinvalue == LOW ) {
552  // GpxHandler();
553  // }
554  // usbSM(); //USB state machine
555  return ( rcode);
556 }
557 
558 template< typename SPI_SS, typename INTR >
560  uint8_t HIRQ;
561  uint8_t HIRQ_sendback = 0x00;
562  HIRQ = regRd(rHIRQ); //determine interrupt source
563  //if( HIRQ & bmFRAMEIRQ ) { //->1ms SOF interrupt handler
564  // HIRQ_sendback |= bmFRAMEIRQ;
565  //}//end FRAMEIRQ handling
566  if(HIRQ & bmCONDETIRQ) {
567  busprobe();
568  HIRQ_sendback |= bmCONDETIRQ;
569  }
570  /* End HIRQ interrupts handling, clear serviced IRQs */
571  regWr(rHIRQ, HIRQ_sendback);
572  return ( HIRQ_sendback);
573 }
574 //template< typename SPI_SS, typename INTR >
575 //uint8_t MAX3421e< SPI_SS, INTR >::GpxHandler()
576 //{
577 // uint8_t GPINIRQ = regRd( rGPINIRQ ); //read GPIN IRQ register
584 // return( GPINIRQ );
585 //}
586 
587 #endif // _USBHOST_H_
MAX3421e()
Definition: usbhost.h:168
uint8_t Task()
Definition: usbhost.h:540
uint8_t GpxHandler()
uint16_t reset()
Definition: usbhost.h:410
int8_t Init()
Definition: usbhost.h:424
uint8_t regRd(uint8_t reg)
Definition: usbhost.h:280
void vbusPower(VBUS_t state)
Definition: usbhost.h:150
void busprobe()
Definition: usbhost.h:505
void regWr(uint8_t reg, uint8_t data)
Definition: usbhost.h:179
uint8_t * bytesWr(uint8_t reg, uint8_t nbytes, uint8_t *data_p)
Definition: usbhost.h:222
uint8_t getVbusState(void)
Definition: usbhost.h:154
uint8_t gpioRd()
Reads the current GPI input values.
Definition: usbhost.h:386
uint8_t gpioRdOutput()
Reads the current GPI output values.
Definition: usbhost.h:399
uint8_t * bytesRd(uint8_t reg, uint8_t nbytes, uint8_t *data_p)
Definition: usbhost.h:319
uint8_t IntHandler()
Definition: usbhost.h:559
void gpioWr(uint8_t data)
Definition: usbhost.h:271
Definition: usbhost.h:38
static void init()
Definition: usbhost.h:61
#define bmFDUPSPI
Definition: max3421e.h:75
#define rIOPINS2
Definition: max3421e.h:100
#define rUSBIRQ
Definition: max3421e.h:50
#define bmFRAMEIE
Definition: max3421e.h:164
#define rIOPINS1
Definition: max3421e.h:88
#define rUSBCTL
Definition: max3421e.h:62
#define rHRSL
Definition: max3421e.h:203
#define rMODE
Definition: max3421e.h:167
#define bmCONDETIE
Definition: max3421e.h:163
#define SE0
Definition: max3421e.h:35
#define MODE_FS_HOST
Definition: max3421e.h:231
#define rCPUCTL
Definition: max3421e.h:67
#define bmSEPIRQ
Definition: max3421e.h:174
#define bmHOST
Definition: max3421e.h:170
#define SE1
Definition: max3421e.h:36
#define bmSE0
Definition: max3421e.h:210
#define rPINCTL
Definition: max3421e.h:73
#define rHCTL
Definition: max3421e.h:181
#define bmDMPULLDN
Definition: max3421e.h:176
#define bmJSTATUS
Definition: max3421e.h:209
#define FSHOST
Definition: max3421e.h:37
#define bmLOWSPEED
Definition: max3421e.h:171
#define rHIRQ
Definition: max3421e.h:144
#define rHIEN
Definition: max3421e.h:155
#define LSHOST
Definition: max3421e.h:38
#define bmCHIPRES
Definition: max3421e.h:64
#define MODE_LS_HOST
Definition: max3421e.h:232
#define bmDPPULLDN
Definition: max3421e.h:177
#define bmINTLEVEL
Definition: max3421e.h:76
#define bmCONDETIRQ
Definition: max3421e.h:151
#define bmSE1
Definition: max3421e.h:211
#define bmOSCOKIRQ
Definition: max3421e.h:54
#define bmSAMPLEBUS
Definition: max3421e.h:185
#define bmKSTATUS
Definition: max3421e.h:208
#define GPX_VBDET
Definition: max3421e.h:82
#define USB_SPI
Definition: settings.h:33
#define XMEM_ACQUIRE_SPI()
Definition: settings.h:134
#define XMEM_RELEASE_SPI()
Definition: settings.h:135
VBUS_t
Definition: usbhost.h:129
@ vbus_on
Definition: usbhost.h:130
@ vbus_off
Definition: usbhost.h:131