#include "cdcacm.h"

Include dependency graph for cdc_XR21B1411.h:

This graph shows which files directly or indirectly include this file:

Classes
class	XR21B1411

Macros
#define	XR_REG_CUSTOM_DRIVER (0x020DU)

#define	XR_REG_CUSTOM_DRIVER_ACTIVE (0x0001U)

#define	XR_REG_ACM_FLOW_CTL (0x0216U)

#define	XR_REG_FLOW_CTL (0x0C06U)

#define	XR_REG_FLOW_CTL_HALF_DPLX (0x0008U)

#define	XR_REG_FLOW_CTL_MODE_MASK (0x0007U)

#define	XR_REG_FLOW_CTL_NONE (0x0000U)

#define	XR_REG_FLOW_CTL_HW (0x0001U)

#define	XR_REG_FLOW_CTL_SW (0x0002U)

#define	XR_REG_FLOW_CTL_MMMRX (0x0003U)

#define	XR_REG_FLOW_CTL_MMMRXTX (0x0004U)

#define	XR_REG_ACM_GPIO_MODE (0x0217U)

#define	XR_REG_GPIO_MODE (0x0C0CU)

#define	XR_REG_GPIO_MODE_GPIO (0x0000U)

#define	XR_REG_GPIO_MODE_FC_RTSCTS (0x0001U)

#define	XR_REG_GPIO_MODE_FC_DTRDSR (0x0002U)

#define	XR_REG_GPIO_MODE_ATE (0x0003U)

#define	XR_REG_GPIO_MODE_ATE_ADDRESS (0x0004U)

#define	XR_REG_ACM_GPIO_DIR (0x0218U)

#define	XR_REG_GPIO_DIR (0x0C0DU)

#define	XR_REG_ACM_GPIO_INT (0x0219U)

#define	XR_REG_GPIO_INT (0x0C11U)

#define	XR_REG_GPIO_MASK (0x001FU)

#define	XR_REG_UART_ENABLE (0x0C00U)

#define	XR_REG_UART_ENABLE_RX (0x0002U)

#define	XR_REG_UART_ENABLE_TX (0x0001U)

#define	XR_REG_ERROR_STATUS (0x0C09U)

#define	XR_REG_ERROR_STATUS_MASK (0x00F8U)

#define	XR_REG_ERROR_STATUS_ERROR (0x0070U)

#define	XR_REG_ERROR_STATUS_BREAK (0x0008U)

#define	XR_REG_ERROR_STATUS_OVERRUN (0x0010U)

#define	XR_REG_ERROR_STATUS_PARITY (0x0020U)

#define	XR_REG_ERROR_STATUS_FRAME (0x0040U)

#define	XR_REG_ERROR_STATUS_BREAK (0x0080U)

#define	XR_REG_TX_BREAK (0x0C0AU)

#define	XR_REG_XCVR_EN_DELAY (0x0C0BU)

#define	XR_REG_GPIO_SET (0x0C0EU)

#define	XR_REG_GPIO_CLR (0x0C0FU)

#define	XR_REG_GPIO_STATUS (0x0C10U)

#define	XR_REG_CUSTOMISED_INT (0x0C12U)

#define	XR_REG_PIN_PULLUP_ENABLE (0x0C14U)

#define	XR_REG_PIN_PULLDOWN_ENABLE (0x0C15U)

#define	XR_REG_LOOPBACK (0x0C16U)

#define	XR_REG_RX_FIFO_LATENCY (0x0CC2U)

#define	XR_REG_RX_FIFO_LATENCY_ENABLE (0x0001U)

#define	XR_REG_WIDE_MODE (0x0D02U)

#define	XR_REG_WIDE_MODE_ENABLE (0x0001U)

#define	XR_REG_XON_CHAR (0x0C07U)

#define	XR_REG_XOFF_CHAR (0x0C08U)

#define	XR_REG_TX_FIFO_RESET (0x0C80U)

#define	XR_REG_TX_FIFO_COUNT (0x0C81U)

#define	XR_REG_RX_FIFO_RESET (0x0CC0U)

#define	XR_REG_RX_FIFO_COUNT (0x0CC1U)

#define	XR_WRITE_REQUEST_TYPE (0x40U)

#define	XR_READ_REQUEST_TYPE (0xC0U)

#define	XR_MAX_ENDPOINTS 4

Macro Definition Documentation

#define XR_REG_CUSTOM_DRIVER (0x020DU)

Definition at line 24 of file cdc_XR21B1411.h.

#define XR_REG_CUSTOM_DRIVER_ACTIVE (0x0001U)

Definition at line 25 of file cdc_XR21B1411.h.

#define XR_REG_ACM_FLOW_CTL (0x0216U)

Definition at line 27 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL (0x0C06U)

Definition at line 28 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_HALF_DPLX (0x0008U)

Definition at line 29 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_MODE_MASK (0x0007U)

Definition at line 30 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_NONE (0x0000U)

Definition at line 31 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_HW (0x0001U)

Definition at line 32 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_SW (0x0002U)

Definition at line 33 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_MMMRX (0x0003U)

Definition at line 34 of file cdc_XR21B1411.h.

#define XR_REG_FLOW_CTL_MMMRXTX (0x0004U)

Definition at line 35 of file cdc_XR21B1411.h.

#define XR_REG_ACM_GPIO_MODE (0x0217U)

Definition at line 37 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MODE (0x0C0CU)

Definition at line 38 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MODE_GPIO (0x0000U)

Definition at line 39 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MODE_FC_RTSCTS (0x0001U)

Definition at line 40 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MODE_FC_DTRDSR (0x0002U)

Definition at line 41 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MODE_ATE (0x0003U)

Definition at line 42 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MODE_ATE_ADDRESS (0x0004U)

Definition at line 43 of file cdc_XR21B1411.h.

#define XR_REG_ACM_GPIO_DIR (0x0218U)

Definition at line 45 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_DIR (0x0C0DU)

Definition at line 46 of file cdc_XR21B1411.h.

#define XR_REG_ACM_GPIO_INT (0x0219U)

Definition at line 48 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_INT (0x0C11U)

Definition at line 49 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_MASK (0x001FU)

Definition at line 50 of file cdc_XR21B1411.h.

#define XR_REG_UART_ENABLE (0x0C00U)

Definition at line 52 of file cdc_XR21B1411.h.

#define XR_REG_UART_ENABLE_RX (0x0002U)

Definition at line 53 of file cdc_XR21B1411.h.

#define XR_REG_UART_ENABLE_TX (0x0001U)

Definition at line 54 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS (0x0C09U)

Definition at line 56 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_MASK (0x00F8U)

Definition at line 57 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_ERROR (0x0070U)

Definition at line 58 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_BREAK (0x0008U)

Definition at line 63 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_OVERRUN (0x0010U)

Definition at line 60 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_PARITY (0x0020U)

Definition at line 61 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_FRAME (0x0040U)

Definition at line 62 of file cdc_XR21B1411.h.

#define XR_REG_ERROR_STATUS_BREAK (0x0080U)

Definition at line 63 of file cdc_XR21B1411.h.

#define XR_REG_TX_BREAK (0x0C0AU)

Definition at line 65 of file cdc_XR21B1411.h.

#define XR_REG_XCVR_EN_DELAY (0x0C0BU)

Definition at line 67 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_SET (0x0C0EU)

Definition at line 69 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_CLR (0x0C0FU)

Definition at line 71 of file cdc_XR21B1411.h.

#define XR_REG_GPIO_STATUS (0x0C10U)

Definition at line 73 of file cdc_XR21B1411.h.

#define XR_REG_CUSTOMISED_INT (0x0C12U)

Definition at line 75 of file cdc_XR21B1411.h.

#define XR_REG_PIN_PULLUP_ENABLE (0x0C14U)

Definition at line 77 of file cdc_XR21B1411.h.

#define XR_REG_PIN_PULLDOWN_ENABLE (0x0C15U)

Definition at line 79 of file cdc_XR21B1411.h.

#define XR_REG_LOOPBACK (0x0C16U)

Definition at line 81 of file cdc_XR21B1411.h.

#define XR_REG_RX_FIFO_LATENCY (0x0CC2U)

Definition at line 83 of file cdc_XR21B1411.h.

#define XR_REG_RX_FIFO_LATENCY_ENABLE (0x0001U)

Definition at line 84 of file cdc_XR21B1411.h.

#define XR_REG_WIDE_MODE (0x0D02U)

Definition at line 86 of file cdc_XR21B1411.h.

#define XR_REG_WIDE_MODE_ENABLE (0x0001U)

Definition at line 87 of file cdc_XR21B1411.h.

#define XR_REG_XON_CHAR (0x0C07U)

Definition at line 89 of file cdc_XR21B1411.h.

#define XR_REG_XOFF_CHAR (0x0C08U)

Definition at line 90 of file cdc_XR21B1411.h.

#define XR_REG_TX_FIFO_RESET (0x0C80U)

Definition at line 92 of file cdc_XR21B1411.h.

#define XR_REG_TX_FIFO_COUNT (0x0C81U)

Definition at line 93 of file cdc_XR21B1411.h.

#define XR_REG_RX_FIFO_RESET (0x0CC0U)

Definition at line 94 of file cdc_XR21B1411.h.

#define XR_REG_RX_FIFO_COUNT (0x0CC1U)

Definition at line 95 of file cdc_XR21B1411.h.

#define XR_WRITE_REQUEST_TYPE (0x40U)

Definition at line 97 of file cdc_XR21B1411.h.

#define XR_READ_REQUEST_TYPE (0xC0U)

Definition at line 99 of file cdc_XR21B1411.h.

#define XR_MAX_ENDPOINTS 4

Definition at line 101 of file cdc_XR21B1411.h.

Classes

Macros

Macro Definition Documentation